A new month, a new project. This is the first phase of the 68k (maybe 020, 030 later?) accelerator card for the Amiga 500.
- Getting the bus from the motherboard CPU
- Resolving the E clock issue, as the MB CPU always generates the E clock, even when it is not a bus master
- Designing an external 7 MHz CPU board, with asynchronous CIA access (using the MB E clock)
- Accelerating the system to 14 MHz (sync mode) or 16 MHz (async mode)
- Fixing the DTACK issue when accessing the amiga bus (chips)
- Adding own dynamic RAM running at 14/16 MHz
Steps 1-4 are complete, the system is running stable at 14 MHz. As the program is running from the Amiga's RAM, the speedup is very tiny (cca. 12%) as visible on the screenshot below.
Like my other projects, this card is also built on a home made 2 layer PCB:
And some CPU measurements at 7 and 14 MHz:
|14 MHz CPU cycle with delayed /DTACK (14M clock, original /DTACK, delayed /DTACK, /AS)|
|Kefmania running at 14 MHz|
Powerpacker measurements also confirm the 12-13% speedup, as expected.
More details are coming soon. Stay tuned! :)